Home Session

Session

· Contributors · Organizations · Search Program

Workshop

: Second International Workshop on RISC-V for HPC

Session Chairs

Tactical Computing Laboratories LLC

Texas Tech University

Edinburgh Parallel Computing Centre (EPCC)

University of Edinburgh, Scotland

Codeplay Software Ltd

Khronos Group Inc

Event Type

Workshop

TimeMonday, 13 November 20232pm - 5:30pm

Location507

Tags

Registration Categories

Presentations

2:00pm - 2:05pm	Introduction and Welcome Presenter Nick Brown
2:05pm - 2:40pm	RISC-V Everywhere Presenter Mark Himelstein
2:40pm - 2:45pm	Lightning Vendor Talk: Esperanto Technologies ET-SoC for AI and ML Workloads Presenter Lee Flanagin
2:45pm - 2:50pm	Lightning Vendor Talk: The InspireSemi Next Gen Thunderbird Compute Accelerator for HPC, AI, and Graph Analytics Presenter Doug Norton
2:50pm - 2:55pm	Lightning Vendor Talk: SG2042 Empowering RISC-V in High-Performance Computing Presenter Liuxi Yang
2:55pm - 3:00pm	Lightning Vendor Talk: E4 Experience with RISC-V in HPC Presenter Daniele Gregori
3:00pm - 3:30pm	RISC-V for HPC – Afternoon Break
3:30pm - 3:50pm	An Empirical Comparison of the RISC-V and AArch64 Instruction Sets Author/Presenters Daniel Weaver Simon McIntosh-Smith
3:50pm - 4:10pm	Evaluating HPX and Kokkos on RISC-V Using an Astrophysics Application Octo-Tiger Author/Presenters Patrick Diehl Gregor Daiss Steven Brandt Alireza Kheirkhahan Hartmut Kaiser Christopher Taylor John Leidel
4:10pm - 4:30pm	Is RISC-V Ready for HPC Prime-Time: Evaluating the 64-Core Sophon SG2042 RISC-V CPU Author/Presenters Nick Brown Maurice Jamieson Joseph Lee
4:30pm - 4:50pm	Short Reasons for Long Vectors in HPC CPUs: A Study Based on RISC-V Author/Presenters Pablo Vizcaino Georgios Leronymakis Nikolaos Dimou Vassilis Papaefstathiou Jesus Labarta Filippo Mantovani
4:50pm - 5:10pm	Automatic Generation of Micro-Kernels for Performance Portability of Matrix Multiplication on RISC-V Vector Processors Author/Presenters Francisco Igual Luis Piñuel Sandra Catalán Héctor Martínez Adrián Castelló Enrique Quintana-Ortí
5:10pm - 5:30pm	Challenges and Opportunities in the Co-Design of Convolutions and RISC-V Vector Processors Author/Presenters Sonia Rani Gupta Nikela Papadopoulou Miquel Pericàs
5:30pm - 6:00pm	Second International Workshop on RISC-V for HPC Organizers Nick Brown John Davis John Leidel Michael Wong Andy Gothard