BEGIN:VCALENDAR
VERSION:2.0
PRODID:Linklings LLC
BEGIN:VTIMEZONE
TZID:America/Denver
X-LIC-LOCATION:America/Denver
BEGIN:DAYLIGHT
TZOFFSETFROM:-0700
TZOFFSETTO:-0600
TZNAME:MDT
DTSTART:19700308T020000
RRULE:FREQ=YEARLY;BYMONTH=3;BYDAY=2SU
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:-0600
TZOFFSETTO:-0700
TZNAME:MST
DTSTART:19701101T020000
RRULE:FREQ=YEARLY;BYMONTH=11;BYDAY=1SU
END:STANDARD
END:VTIMEZONE
BEGIN:VEVENT
DTSTAMP:20260422T000711Z
LOCATION:507
DTSTART;TZID=America/Denver:20231113T144500
DTEND;TZID=America/Denver:20231113T145000
UID:submissions.supercomputing.org_SC23_sess455_misc248@linklings.com
SUMMARY:Lightning Vendor Talk:  The InspireSemi Next Gen Thunderbird Compu
 te Accelerator for HPC, AI, and Graph Analytics
DESCRIPTION:Doug Norton\n\nDoug will give an overview of Austin-based Insp
 ireSemi’s disruptive next generation Thunderbird compute accelerator targe
 ting HPC and graph analytics applications. This RISC-V based “supercompute
 r-cluster-on-a-chip” packs 1,536 high performance CPU cores (all FP64 doub
 le-precision of their own design) onto a single SOC, and the initial produ
 ct will be a PCIe card with 4 Thunderbird chips, delivering >6,000 FP64 co
 res. For maximum/predictable performance and low latency, these CPU cores 
 are all interconnected with their high speed mesh network fabric which can
  connect up to 256 Thunderbird chips. After >3 years of customer-driven de
 velopment, the chip is in final verification and will tape out in November
  to TSMC.\n\nTag: Architecture and Networks, Hardware Technologies\n\nRegi
 stration Category: Workshop Reg Pass\n\nSession Chairs: Nick Brown (Edinbu
 rgh Parallel Computing Centre (EPCC); University of Edinburgh, Scotland); 
 John Davis (Openchip); Andy Gothard (Siemens); John Leidel (Tactical Compu
 ting Laboratories LLC, Texas Tech University); and Michael Wong (Codeplay 
 Software Ltd, Khronos Group Inc)\n\n
END:VEVENT
END:VCALENDAR