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TZOFFSETFROM:-0600
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RRULE:FREQ=YEARLY;BYMONTH=11;BYDAY=1SU
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DTSTAMP:20260422T000612Z
LOCATION:405-406-407
DTSTART;TZID=America/Denver:20231117T083000
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UID:submissions.supercomputing.org_SC23_sess462@linklings.com
SUMMARY:Fourth Workshop on Heterogeneous Memory Systems (HMEM)
DESCRIPTION:HMEM – Morning Break\n---------------------\nCachedArrays:  AP
 I and Framework to Optimize Data Movement for Heterogeneous Memory Systems
 \n\nWe propose a new framework called CachedArrays and a set of APIs to ad
 dress the data tiering problem in large scale heterogeneous and disaggrega
 ted memory systems. The proposed framework operates at a variable size obj
 ect granularity and allows the programmer to specify semantic hints about 
 future u...\n\n\nMark Hildebrand, Jason Lowe-Power, and Venkatesh Akella (
 University of California, Davis)\n---------------------\nHMEM – Welcome\n\
 nWelcome to the HMEM Workshop 2023\n\n\nJoao Barreto (INESC-ID, Portugal; 
 Universidade de Lisboa) and Antonio J. Peña (Barcelona Supercomputing Cent
 er (BSC))\n---------------------\nDAOS Beyond Persistent Memory:  Architec
 ture and Initial Performance Results\n\nThe Distributed Asynchronous Objec
 t Storage (DAOS) is an open source scale-out storage system that is design
 ed from the ground up to support Storage Class Memory (SCM) and NVMe stora
 ge in user space. Until now, the DAOS storage stack has been based on Inte
 l Optane Persistent Memory (PMem) and the Pe...\n\n\nMichael Hennecke (Int
 el Corporation)\n---------------------\nKeynote: Empowering Large AI Model
 s Based on Heterogeneous Memory\n\nThe size of large artificial intelligen
 ce (AI) models has increased by at least 100x in the past few years, which
  leads to memory consumption at the scale of hundreds of GBs and even TBs.
  Recent advance of heterogeneous memory (HM) provides a cost-effective app
 roach to increase memory capacity. Usin...\n\n\nDong Li (University of Cal
 ifornia, Merced)\n---------------------\nFourth Workshop on Heterogeneous 
 Memory Systems (HMEM)\n\nHeterogeneous memory architectures have recently 
 emerged and revolutionized the traditional memory hierarchy. Today’s archi
 tectures may comprise multiple memory technologies next to DRAM, such as: 
 3D-stacked memory, high-bandwidth multi-channel RAM, persistent memory, or
  Compute Express Link (...\n\n\nHatem Elshazly (Barcelona Supercomputing C
 enter (BSC)); Harald Servat (Intel Corporation); Joao Pedro Barreto (INESC
 -ID, Instituto Superior Técnico, Universidade de Lisboa); and Antonio Peña
  (Barcelona Supercomputing Center (BSC))\n---------------------\nEvaluatin
 g the Latest Optane Memory: A Glorious Swansong?\n\nWe evaluate the 3rd ge
 neration of Intel's Optane non-volatile memory technology, assess the perf
 ormance it can provide, and investigate the modes of use that can be benef
 icial in high performance computing, both for application performance and 
 system architecture. We demonstrate sustained performanc...\n\n\nAdrian Ja
 ckson (University of Edinburgh)\n---------------------\nPersistent Snapsho
 t Isolation with Unlimited Reads on Commodity Hardware Transactional Memor
 y\n\nPersistent Memory (PM) has been proposed and commercially used as a n
 ovel generation of storage devices capable of competing with both primary 
 and secondary memory, attaining features such as data persistency and byte
  addressability.\n\nThese devices paved the way for researchers to develop
  Transactio...\n\n\nMiguel Figueiredo and Daniel Castro (INESC-ID, Institu
 to Superior Técnico, Universidade de Lisboa); Alexandro Baldassin (São Pau
 lo State University (Unesp)); and João Barreto and Paolo Romano (INESC-ID,
  Instituto Superior Técnico, Universidade de Lisboa)\n\nTag: Data Movement
  and Memory, Fault Handling and Tolerance, Hardware Technologies, Heteroge
 neous Computing, I/O and File Systems, Performance Measurement, Modeling, 
 and Tools, Programming Frameworks and System Software, Security\n\nRegistr
 ation Category: Workshop Reg Pass\n\nSession Chairs: João Barreto (INESC-I
 D, IST, University of Lisbon; Universidade de Lisboa); Hatem ElShazly (Son
 y); Antonio J. Peña (Barcelona Supercomputing Center (BSC); Universitat Po
 litècnica de Catalunya (UPC), Spain); and Harald Servat (Intel Corporation
 )
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