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DTSTART;TZID=America/Denver:20231117T094000
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UID:submissions.supercomputing.org_SC23_sess459_ws_h2rc106@linklings.com
SUMMARY:Enabling Communication with FPGA-Based Network-Attached Accelerato
 rs for HPC Workloads
DESCRIPTION:Steffen Christgau and Dylan Everingham (Zuse Institute Berlin)
 ; Florian Mikolajczak (University of Potsdam); Niklas Schelten (Fraunhofer
  Heinrich Hertz Institute); Bettina Schnor and Max Schroetter (University 
 of Potsdam); and Benno Stabernack and Fritjof Steinert (Fraunhofer Heinric
 h Hertz Institute, University of Potsdam)\n\nThe use of stand-alone, netwo
 rk-coupled FPGA accelerators is intended to significantly increase the ene
 rgy efficiency of HPC applications and thus also of HPC data centers. A lo
 ose coupling between the nodes of the HPC data center and the FPGAs is est
 ablished through the high-speed network of the data center. This allows gr
 eater flexibility in combining different nodes and accelerators. Both the 
 resulting energy savings and the increased flexibility through the network
  connection, enable the economical use of FPGAs. This work presents a comm
 unication stack to integrate the so-called Network-attached Accelerator (N
 AA) into the HPC data center. A low-level RDMA API and a high-level Remote
  Procedure Call API is designed on top of the RoCEv2 communication stack. 
 The experimental results over 100 Gbps RoCEv2 show that our design and imp
 lementation deliver performance close to the theoretical maximum.\n\nTag: 
 Architecture and Networks\n\nRegistration Category: Workshop Reg Pass\n\nS
 ession Chairs: Jason Bakos (University of South Carolina); Franck Cappello
  (Argonne National Laboratory (ANL), University of Illinois); Torsten Hoef
 ler (ETH Zürich, Microsoft Corporation); Kenneth O'Brien (Advanced Micro D
 evices, Inc. (AMD)); and Christian Plessl (Paderborn University, Germany)\
 n\n
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