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DTSTART;TZID=America/Denver:20231113T140000
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UID:submissions.supercomputing.org_SC23_sess458@linklings.com
SUMMARY:Workshop on Memory Technologies, Systems, and Applications
DESCRIPTION:CXL Memory as Persistent Memory for Disaggregated HPC:  A Prac
 tical Approach\n\nIn the landscape of High-Performance Computing (HPC), th
 e quest for efficient and scalable memory solutions remains paramount. The
  advent of Compute Express Link (CXL) introduces a promising avenue with i
 ts potential to function as a Persistent Memory (PMem) solution in the con
 text of disaggregated ...\n\n\nYehonatan Fridman (Ben-Gurion University of
  the Negev, Israel; NRCN); Suprasad Mutalik Desai, Navneet Singh, and Thom
 as Willhalm (Intel Corporation); and Gal Oren (Technion - Israel Institute
  of Technology, NRCN)\n---------------------\nKeynote:  A Perspective on 1
 000x Energy Efficiency in 20 Years\n\nStephen Pawlowski (Intel Corporation
 )\n---------------------\nWorkshop on Memory Technologies, Systems, and Ap
 plications\n\nThe growing disparity between compute and memory speed, know
 n as the memory wall problem, has been one of the most critical and long-s
 tanding challenges in the computing industry. The prevalence of heterogene
 ous computing, the ongoing expansion of the memory hierarchy, and the adve
 nt of disaggregate...\n\n\nTyler Allen (University of North Carolina, Char
 lotte); Ivy Peng (KTH Royal Institute of Technology, Sweden); Ron Brightwe
 ll (Sandia National Laboratories); and Maya Gokhale (Lawrence Livermore Na
 tional Laboratory (LLNL))\n---------------------\nGPU Graph Processing on 
 CXL-Based Microsecond-Latency External Memory\n\nIn GPU graph analytics, t
 he use of external memory such as the host DRAM and solid-state drives is 
 a cost-effective approach to processing large graphs beyond the capacity o
 f the GPU onboard memory. This paper studies the use of Compute Express Li
 nk (CXL) memory as alternative external memory for GP...\n\n\nShintaro San
 o, Yosuke Bando, Kazuhiro Hiwada, Hirotsugu Kajihara, Tomoya Suzuki, Yu Na
 kanishi, Daisuke Taki, Akiyuki Kaneko, and Tatsuo Shiozawa (Kioxia Corpora
 tion)\n---------------------\nMTSA – Afternoon Break\n--------------------
 -\nDynamic Memory Provisioning on Disaggregated HPC Systems\n\nDisaggregat
 ed memory intends to break the rigid boundaries between node memory hierar
 chies by providing memory as a pooled resource. The resource manager alloc
 ates system’s memory at job’s submission time. But it is hard for users to
  know the job's precise peak memory footprint, and prio...\n\n\nFelippe Za
 carias (Universitat Politècnica de Catalunya, Barcelona Supercomputing Cen
 ter (BSC)); Paul Carpenter (Barcelona Supercomputing Center (BSC)); and Vi
 nicius Petrucci (Micron Technology Inc)\n---------------------\nAccelerati
 ng In Situ Analysis Using Non-volatile Memory\n\nThe relatively slower dat
 a transfer speeds resulting in I/O bottlenecks in scientific simulations i
 s one of the critical challenges in exascale computing. Simulations genera
 te large data and analysis applications consume this data to provide time-
 critical insights. The limited size and high power co...\n\n\nDeepak B. He
 gde and Preeti Malakar (Indian Institute of Technology (IIT), Kanpur)\n\nT
 ag: Applications, Architecture and Networks, Data Movement and Memory, Het
 erogeneous Computing, I/O and File Systems, Large Scale Systems, Middlewar
 e and System Software, Performance Measurement, Modeling, and Tools, Perfo
 rmance Optimization\n\nRegistration Category: Workshop Reg Pass\n\nSession
  Chairs: Tyler Allen (NVIDIA), Ron Brightwell (Sandia National Laboratorie
 s), Maya Gokhale (Lawrence Livermore National Laboratory (LLNL)), and Ivy 
 Peng (KTH Royal Institute of Technology)
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