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DTSTART;TZID=America/Denver:20231112T164200
DTEND;TZID=America/Denver:20231112T165400
UID:submissions.supercomputing.org_SC23_sess438_ws_corr107@linklings.com
SUMMARY:Adding Microbenchmarks with SIMD Data Race to DataRaceBench
DESCRIPTION:Joachim Jenke, Kaloyan Ignatov, and Simon Schwitanski (RWTH Aa
 chen University)\n\nData race detection tools should find data races not o
 nly in development builds of applications, but also in optimized productio
 n builds.  An architecture-dependent optimization includes vectorization o
 f the code.  At the moment, DataRaceBench does not contain microkernels th
 at test for data races in vectorized code.  The few codes with SIMD direct
 ives are too simple, so that compilers tend to refuse vectorizing the loop
 .  We carefully created new microkernels with and without data race that a
  tool will only detect if vector instructions are considered in the analys
 is.  The new microkernels cover different vectorized memory access instruc
 tions.  We used the new microkernels to verify the support for vectorized 
 memory accesses in Intel Inspector and LLVM ThreadSanitizer. \nWhile Intel
  Inspector could detect all data races in the new microkernels, ThreadSani
 tizer could not find the data races when the code is vectorized.\n\nTag: A
 pplications, Software Engineering\n\nRegistration Category: Workshop Reg P
 ass\n\nSession Chairs: Ignacio Laguna (Lawrence Livermore National Laborat
 ory (LLNL)); Cindy Rubio-González (University of California, Davis); and E
 mmanuelle Saillard (French Institute for Research in Computer Science and 
 Automation (INRIA))\n\n
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