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DTSTAMP:20260422T000712Z
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DTSTART;TZID=America/Denver:20231112T163000
DTEND;TZID=America/Denver:20231112T165500
UID:submissions.supercomputing.org_SC23_sess431_ws_drbsd107@linklings.com
SUMMARY:Streaming Hardware Compressor Generator Framework
DESCRIPTION:Kazutomo Yoshii (Argonne National Laboratory (ANL)), Tomohiro 
 Ueno and Kentaro Sano (RIKEN Center for Computational Science (R-CCS)), an
 d Antonino Miceli and Franck Cappello (Argonne National Laboratory (ANL))\
 n\nThe interest in and strong demand for application-specific accelerators
  in computing and sensor data processing are rising. Simultaneously, data 
 movement bottlenecks are increasingly becoming a significant limiting fact
 or for these accelerators. Integrating an extremely resource-efficient, ul
 tra-low-latency compressor block into their data path or pipeline could so
 lve or mitigate data movement bottlenecks and enhance the performance of t
 hese accelerators. However, workflows for hardware compressor architecture
  exploration are little studied. We introduce a generator framework for de
 signing, verifying, and estimating resources in streaming hardware compres
 sor architectures to fill the gap. This framework assists users in explori
 ng different compressor architectures with different compressor building b
 locks, evaluating their characteristics (latency, throughput, gate counts)
 , and generating RTL code for integrating them into custom accelerator des
 igns. Our motivation is to bridge the gap between software and hardware ex
 perts through this proposed framework as a co-design tool.\n\nTag: Data An
 alysis, Visualization, and Storage, Data Compression\n\nRegistration Categ
 ory: Workshop Reg Pass\n\nSession Chairs: Sheng Di (Argonne National Labor
 atory (ANL), University of Chicago); Dingwen Tao (Institute of Computing T
 echnology, Chinese Academy of Sciences; University of Chinese Academy of S
 ciences); Ana Gainaru (Oak Ridge National Laboratory (ORNL)); Jieyang Chen
  (University of Oregon); Shadi Ibrahim (French Institute for Research in C
 omputer Science and Automation (INRIA)); and Xin Liang (Oregon State Unive
 rsity)\n\n
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