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UID:submissions.supercomputing.org_SC23_sess303_rpost225@linklings.com
SUMMARY:QASM-to-HLS:  A Framework for Accelerating Quantum Circuit Emulati
 on on High-Performance Reconfigurable Computers
DESCRIPTION:Anshul Maurya and Naveed Mahmud (Florida Institute of Technolo
 gy)\n\nHigh-performance reconfigurable computers (HPRCs) make use of Field
 -Programmable Gate Arrays (FPGAs) for efficient emulation of quantum algor
 ithms. Generally, algorithm-specific architectures are implemented on the 
 FPGAs, and there is very little flexibility. Moreover, mapping a quantum a
 lgorithm onto its equivalent FPGA emulation architecture is challenging. I
 n this work, we present an automation framework for converting quantum alg
 orithms/circuits to their equivalent FPGA emulation architectures. The fra
 mework processes quantum circuits represented in Quantum Assembly Language
  (QASM) and derives high-level descriptions of the hardware emulation arch
 itectures for High-Level Synthesis (HLS) on HPRCs. Experimental results sh
 ow that the framework-generated architectures deployed on an HPRC perform 
 faster than a state-of-the-art software simulator.\n\nTag: Artificial Inte
 lligence/Machine Learning, Architecture and Networks, Heterogeneous Comput
 ing, I/O and File Systems, Performance Measurement, Modeling, and Tools, P
 ost-Moore Computing, Programming Frameworks and System Software, Quantum C
 omputing\n\nRegistration Category: Tech Program Reg Pass, Exhibits Reg Pas
 s\n\n
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