BEGIN:VCALENDAR
VERSION:2.0
PRODID:Linklings LLC
BEGIN:VTIMEZONE
TZID:America/Denver
X-LIC-LOCATION:America/Denver
BEGIN:DAYLIGHT
TZOFFSETFROM:-0700
TZOFFSETTO:-0600
TZNAME:MDT
DTSTART:19700308T020000
RRULE:FREQ=YEARLY;BYMONTH=3;BYDAY=2SU
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:-0600
TZOFFSETTO:-0700
TZNAME:MST
DTSTART:19701101T020000
RRULE:FREQ=YEARLY;BYMONTH=11;BYDAY=1SU
END:STANDARD
END:VTIMEZONE
BEGIN:VEVENT
DTSTAMP:20260422T000621Z
LOCATION:503-504
DTSTART;TZID=America/Denver:20231116T133000
DTEND;TZID=America/Denver:20231116T150000
UID:submissions.supercomputing.org_SC23_sess255@linklings.com
SUMMARY:Exhibitor Forum: Machines III
DESCRIPTION:Accelerating Data Analytics Using Object Based Computational S
 torage in a HPC\n\nHPC not only performs complex calculations at high spee
 d but also processes large amount of data. HPC Systems separates compute n
 ode and storage node to effectively process them. All computation is perfo
 rmed on compute node, and all data is stored in storage node. In order to 
 perform data analytics,...\n\n\nJongryool Kim (SK hynix)\n----------------
 -----\nAccelerating Scientific Workflows with the NVIDIA Grace Hopper Plat
 form\n\nNVIDIA Grace Hopper Superchips are a scale-up architecture ideal f
 or scientific computing workflows involving CPUs and GPUs. Building on a d
 ecade of GPU acceleration, Grace-Hopper realizes NVIDIA NVLink C2C, a 900 
 GB/s interconnect between the Grace CPU and the Hopper H100 GPU. C2C enabl
 es coherent ...\n\n\nMathias Wagner (NVIDIA Corporation)\n----------------
 -----\nCompute Express Link (CXL): Advancing Coherent Connectivity\n\nComp
 ute Express Link™ (CXL™) – an open industry standard interconnect – offers
  coherency and memory semantics using high-bandwidth, low-latency connecti
 vity between the host processor and devices such as accelerators, memory b
 uffers, and smart I/O devices. CXL advances memory...\n\n\nKurt Lender (In
 tel Corporation, Compute Express Link (CXL) Consortium)\n\nTag: Artificial
  Intelligence/Machine Learning, Architecture and Networks, Hardware Techno
 logies\n\nRegistration Category: Tech Program Reg Pass, Exhibits Reg Pass\
 n\nSession Chair: Eishi Arima (Technical University of Munich)
END:VEVENT
END:VCALENDAR