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DTSTAMP:20260422T000712Z
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DTSTART;TZID=America/Denver:20231115T133000
DTEND;TZID=America/Denver:20231115T140000
UID:submissions.supercomputing.org_SC23_sess252_exforum119@linklings.com
SUMMARY:CXL-Based Memory Disaggregation for HPC and AI Workloads
DESCRIPTION:Hokyoon Lee and Jungmin Choi (SK hynix)\n\nThe Compute Express
  Link (CXL) shows a characteristic of composability by nature, which enabl
 es the disaggregation of memory resources via CXL.mem transactions. In thi
 s forum, we focus on the demonstration of two powerful use cases - memory 
 pooling and sharing - from which users can get benefits that have never be
 en experienced before.\n\nMemory Pooling Case: A key to alleviate a memory
  stranding issue\nThe memory utilization of each host server in a compute 
 cluster varies time to time, which mandates system operators to provision 
 each server with DRAM capacity at its peak utilization for real-time or in
 teractive applications. Unused memory in each server can never be utilized
  by other servers, which makes stranded memory. SK hynix’s Niagara, a CXL-
 based pooled memory solution, addresses this stranded memory issue. Our FP
 GA-based pooled memory solution can be connected to four host servers and 
 supports four DDR DIMM channels with maximum capacity of 1TB. In our exhib
 ition booth, we will demonstrate how Niagara can alleviate a memory strand
 ing issue with its Elastic Memory feature.\n\nMemory Sharing Case: A key t
 o realize zero-copy distributed computing framework\nConventional distribu
 ted computing frameworks such as Spark and Ray suffer from heavy network t
 raffic for distributing data and tasks to computing nodes in a cluster. To
  address this issue, we have implemented a memory sharing feature in Niaga
 ra so that multiple host servers can directly access the same shared data 
 without data transfer over a network. In this forum, we demonstrate the ef
 fectiveness of memory sharing with a real workload in Ray framework, which
  is known for being used in ChatGPT.\n\nTag: Architecture and Networks, Da
 ta Movement and Memory, Hardware Technologies\n\nRegistration Category: Te
 ch Program Reg Pass, Exhibits Reg Pass\n\nSession Chair: Ivanna Park (Inte
 rnet2)\n\n
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