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DTSTART;TZID=America/Denver:20231115T133000
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UID:submissions.supercomputing.org_SC23_sess252@linklings.com
SUMMARY:Exhibitor Forum: Machines II
DESCRIPTION:CXL-Based Memory Disaggregation for HPC and AI Workloads\n\nTh
 e Compute Express Link (CXL) shows a characteristic of composability by na
 ture, which enables the disaggregation of memory resources via CXL.mem tra
 nsactions. In this forum, we focus on the demonstration of two powerful us
 e cases - memory pooling and sharing - from which users can get benefits t
 ha...\n\n\nHokyoon Lee and Jungmin Choi (SK hynix)\n---------------------\
 nNVMe Over CXL (NVMe-oC): An Ultimate Optimization of Host-Device Data Mov
 ement\n\nCompute Express Link (CXL), introduced in 2019, manages the Host-
 Accelerator coherency and the Host-Memory interface.  CXL fabric further e
 nables the disaggregated memory architecture.  Most of the CXL development
 s are on the memory interface and not on the storage interface.  In this p
 aper, Wolley ...\n\n\nBernard Shung and San Chang (Wolley, Inc)\n---------
 ------------\nNext Arm Processor FUJITSU-MONAKA and Its Technologies\n\nFu
 jitsu, with over 60 years of processor development history, developed A64F
 X, which was employed in the Supercomputer Fugaku. Fugaku has significantl
 y contributed to accelerating HPC simulations with its high performance an
 d energy efficiency. However, with the practicality of Artificial Intellig
 en...\n\n\nToshio Yoshida (Fujitsu Ltd)\n\nTag: Architecture and Networks,
  Data Movement and Memory, Hardware Technologies\n\nRegistration Category:
  Tech Program Reg Pass, Exhibits Reg Pass\n\nSession Chair: Ivanna Park (I
 nternet2)
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