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DTSTAMP:20260422T000710Z
LOCATION:405-406-407
DTSTART;TZID=America/Denver:20231114T153000
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UID:submissions.supercomputing.org_SC23_sess173_pap220@linklings.com
SUMMARY:Bringing Order to Sparsity: A Sparse Matrix Reordering Study on Mu
 lticore CPUs
DESCRIPTION:James D. Trotter (Simula Research Laboratory); Sinan Ekmekçiba
 şı (Istanbul University - Cerrahpaşa); Johannes Langguth (Simula Research 
 Laboratory; University of Bergen, Norway); Tugba Torun and Emre Düzakın (K
 oç University, Turkey); Aleksandar Ilic (INESC-ID, IST, University of Lisb
 on); and Didem Unat (Koç University, Turkey)\n\nMany real-world computatio
 ns involve sparse data structures in the form of sparse matrices. A common
  strategy for optimizing sparse matrix operations is to reorder a matrix t
 o improve data locality. However, it's not always clear whether reordering
  will provide benefits over the unordered matrix, as its effectiveness dep
 ends on several factors, such as structural features of the matrix, the re
 ordering algorithm and the hardware that is used. This paper aims to estab
 lish the relationship between matrix reordering algorithms and the perform
 ance of sparse matrix operations. We thoroughly evaluate six different mat
 rix reordering algorithms on 490 matrices across eight multicore architect
 ures, focusing on the commonly used sparse matrix-vector multiplication (S
 pMV) kernel. We find that reordering based on graph partitioning provides 
 better SpMV performance than the alternatives for a large majority of matr
 ices, and that the resulting performance is explained through a combinatio
 n of data locality and load balancing concerns.\n\nTag: Accelerators, Appl
 ications, Graph Algorithms and Frameworks, Performance Measurement, Modeli
 ng, and Tools, Programming Frameworks and System Software\n\nRegistration 
 Category: Tech Program Reg Pass\n\nReproducibility Badges: Artifact Availa
 ble, Artifact Functional, Results Reproduced\n\nSession Chair: Mehmet E Be
 lviranli (Colorado School of Mines)\n\n
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