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Paper
:
Fault Tolerance and FPGA Codesign
Session Chair
Lishan Yang
George Mason University (GMU)
Event Type
Paper
Time
Thursday, 16 November 2023
1:30pm
-
3pm
MST
Location
401-402
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Tags
Accelerators
Artificial Intelligence/Machine Learning
Codesign
Fault Handling and Tolerance
Performance Measurement, Modeling, and Tools
Post-Moore Computing
Registration Categories
TP
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Demystifying and Mitigating Cross-Layer Deficiencies of Soft Error Protection in Instruction Duplication
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Co-Design Hardware and Algorithm for Vector Search
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